@inproceedings{ecbfb5bb1d314dd7991f2c2a7cd183d6,
title = "12-bit 80MSPS double folding/interpolation A/D converter",
abstract = "In this paper, a CMOS analog-to-digital converter (ADC) with a 12-bit 80MSPS at 1.8V is designed. The architecture of the proposed ADC is based on a folding ADC with a double folding and interpolating structure. An even folding circuit technique for the high resolution and high speed ADC are introduced. Further, a novel auto-switching encoder is also proposed. The chip has been fabricated with 0.18um 1-poly 6-metal CMOS technology. The active area is 1.6mm2 and 195mw at 1.8V power supply. The DNL and INL are within ±4/ ±4LSB, respectively. The measured result of SNDR is 46dB,when Fin=1MHz at s=80MHz.",
keywords = "ADC, Folding, Interpolating",
author = "Byungil Kim and Daeyun Kim and Jooho Hwang and Junho Moon and Minkyu Song",
year = "2008",
doi = "10.1109/SOCDC.2008.4815720",
language = "English",
isbn = "9781424425990",
series = "2008 International SoC Design Conference, ISOCC 2008",
pages = "III1--III2",
booktitle = "2008 International SoC Design Conference, ISOCC 2008",
note = "2008 International SoC Design Conference, ISOCC 2008 ; Conference date: 24-11-2008 Through 25-11-2008",
}