Abstract
We present a digital-to-analog converter (DAC) with full-swing DAC output and a proposed half-power supply calibration technique. To generate a full-swing DAC output, symmetric thermometer decoders and an output selector are implemented to select the appropriate current cell according to the output voltage range. Furthermore, to improve the linearity, we propose a half-power supply calibration circuit consisting of comparators and calibration counters to control the current of the current cells at the half-power supply voltage point, where the voltage mismatch typically occurs. The DAC was fabricated in a 28 nm CMOS process, with a full chip area of 0.95 mm × 0.93 mm. The measurement results demonstrate a maximum voltage mismatch improvement of 95% when using the proposed half-power supply calibration technique, with DNL and INL values of 0.39 and 1.15 LSB. The total power consumption was 73.8 mW at 100 MSPS, with analog and digital supply voltages of 1.8 and 1.0 V, respectively.
| Original language | English |
|---|---|
| Article number | 3955 |
| Journal | Electronics (Switzerland) |
| Volume | 14 |
| Issue number | 19 |
| DOIs | |
| State | Published - Oct 2025 |
Keywords
- differential non-linearity
- digital-to-analog converter
- foreground calibration
- full-swing DAC
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