Abstract
We present a D-band eight-way power amplifier (PA), which achieves the saturated output power (Psat) of 16.5 dBm in 40-nm bulk CMOS. The proposed D-band PA consists of four push-pull PA units with three stages, whose active device sizes are gradually tapered from the output to the input optimal power efficiency. A cascaded transformer-transformer (balun) structure was employed at the output of the PA unit to avoid self-resonance with an improved balun performance at the D-band. The power combiner/splitter is comprised of microstrip transmission lines (MSTLs) to combine the power of the four PA units in the current domain. The fabricated prototype has a chip size of 0.72 mm2 with a core size of 0.46-mm2 excluding pads. The measured PA achieved a power gain of 14.5 dB with the 3-dB gain bandwidth of 18 GHz (121-139 GHz), a peak PAE of 7.2%, and a saturated output power (Psat) of 16.5 dBm, which demonstrates the highest output power among the recently reported D-band PAs in bulk CMOS.
Original language | English |
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Pages (from-to) | 1019-1022 |
Number of pages | 4 |
Journal | IEEE Microwave and Wireless Technology Letters |
Volume | 34 |
Issue number | 8 |
DOIs | |
State | Published - 2024 |
Keywords
- CMOS
- D-band
- power amplifier (PA)