TY - GEN
T1 - A 1.8V 6-bit 1GS/s 60mW CMOS folding/interpolation ADC using folder reduction circuit and auto switching encoder
AU - Moon, Junho
AU - Kang, Heewon
AU - Kim, Daeyoon
AU - Yeo, Seungjin
AU - Lee, Dubok
AU - Song, Minkyu
PY - 2008
Y1 - 2008
N2 - In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit IGS/s at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. To reduce the power consumption, a folder reduction technique to decrease the number of folding blocks (NFB) by half of the conventional ones is proposed. Further, a novel layout technique is introduced for compact area. With the clock speed of IGS/s, the ADC achieves an effective resolution bandwidth (ERBW) of 200MHz, while consuming only 60mW, of power. The measured INL and DNL were within ± 0.5LSB, ± 0.7LSB, respectively. The measured SNDR, was 33.82dB, when the An=100MHz at Fs=500MHz. The active chip occupies an area of 0.27mm2 in 0.18μm CMOS technology.
AB - In this paper, CMOS analog-to-digital converter (ADC) with a 6-bit IGS/s at 1.8V is described. The architecture of the proposed ADC is based on a folding type ADC using resistive interpolation technique for low power consumption. To reduce the power consumption, a folder reduction technique to decrease the number of folding blocks (NFB) by half of the conventional ones is proposed. Further, a novel layout technique is introduced for compact area. With the clock speed of IGS/s, the ADC achieves an effective resolution bandwidth (ERBW) of 200MHz, while consuming only 60mW, of power. The measured INL and DNL were within ± 0.5LSB, ± 0.7LSB, respectively. The measured SNDR, was 33.82dB, when the An=100MHz at Fs=500MHz. The active chip occupies an area of 0.27mm2 in 0.18μm CMOS technology.
UR - http://www.scopus.com/inward/record.url?scp=57849131920&partnerID=8YFLogxK
U2 - 10.1109/ICECS.2008.4674934
DO - 10.1109/ICECS.2008.4674934
M3 - Conference contribution
AN - SCOPUS:57849131920
SN - 9781424421824
T3 - Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
SP - 638
EP - 641
BT - Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
T2 - 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008
Y2 - 31 August 2008 through 3 September 2008
ER -