A 3 v 6-BIT 70 MSPS DUAL CMOS A/D converter for DBS (direct broadcasting for satellite)

Ho Young Lee, Jae Jin Park, Min Kyu Song, Jae Whui Kim, Kwong Hyun Kim

Research output: Contribution to journalArticlepeer-review

Abstract

In a front-end receiver of DBS (Direct Broadcasting for Satellite), an A/D converter, which converts I/Q signals of QPSK demodulator into digital domain, makes an important role to determine the system performance. In this paper a 3 V dual A/D converter which has 6-b resolution and 70 MSPS conversion rate is proposed. It has the dual flash architecture in which comparators use auto-zero offset cancellation technique. With 0.65 um double-poly and double-metal CMOS technology, the experimental prototype of the proposed A/D converter has ±0.7 LSB INL and ±0.9 LSB DNL.

Original languageEnglish
Pages (from-to)863-867
Number of pages5
JournalIEEE Transactions on Consumer Electronics
Volume43
Issue number3
DOIs
StatePublished - 1997

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