A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip
- A. Lattuca
- , G. Mazza
- , G. Aglieri Rinella
- , C. Cavicchioli
- , N. Chanlek
- , A. Collu
- , Y. Degerli
- , A. Dorokhov
- , C. Flouzat
- , D. Gajanana
- , C. Gao
- , F. Guilloux
- , H. Hillemanns
- , S. Hristozkov
- , A. Junique
- , M. Keil
- , D. Kim
- , M. Kofarago
- , T. Kugathasan
- , Y. Kwon
- University of Turin
- National Institute for Nuclear Physics
- CERN
- Suranaree University of Technology
- University of Cagliari
- L'Orme des Merisiers
- Institut Pluridisciplinaire Hubert Curien
- National Institute for Subatomic Physics
- Central China Normal University
- Yonsei University
- Dongguk University
- Utrecht University
- Warsaw University of Technology
- MIND
- CNRS
- Heidelberg University
- TU Wien
Research output: Contribution to journal › Article › peer-review
3
Scopus
citations