TY - GEN
T1 - A high dynamic range CMOS image sensor with a digital configurable logarithmic counter
AU - Bae, Jaeyoung
AU - Kim, Daehyuk
AU - Hwang, Inkyung
AU - Song, Minkyu
PY - 2013
Y1 - 2013
N2 - Many kinds of high dynamic range (HDR) CMOS Image Sensors (CIS) have been reported, such as a multiple sampling, a multiple exposure technique, and so on. However, those techniques have some disadvantages of noise increasing, large power consumption, and huge chip area. In this paper, a new digital configurable logarithmic counter is described. Since the proposed scheme is easily implemented with a very simple technique, we can reduce power consumption and chip area drastically. Further, the logarithmic counter enhances the dynamic range (DR). The chip which has been fabricated using a 0.13um CIS process has an excellent SNDR at high speed sampling rate.
AB - Many kinds of high dynamic range (HDR) CMOS Image Sensors (CIS) have been reported, such as a multiple sampling, a multiple exposure technique, and so on. However, those techniques have some disadvantages of noise increasing, large power consumption, and huge chip area. In this paper, a new digital configurable logarithmic counter is described. Since the proposed scheme is easily implemented with a very simple technique, we can reduce power consumption and chip area drastically. Further, the logarithmic counter enhances the dynamic range (DR). The chip which has been fabricated using a 0.13um CIS process has an excellent SNDR at high speed sampling rate.
KW - CMOS image sensor
KW - configurable logarithmic counter
KW - high dynamic range
UR - http://www.scopus.com/inward/record.url?scp=84892667618&partnerID=8YFLogxK
U2 - 10.1109/ecctd.2013.6662216
DO - 10.1109/ecctd.2013.6662216
M3 - Conference contribution
AN - SCOPUS:84892667618
SN - 9783000437854
T3 - 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
BT - 2013 European Conference on Circuit Theory and Design, ECCTD 2013 - Proceedings
PB - IEEE Computer Society
T2 - 2013 European Conference on Circuit Theory and Design, ECCTD 2013
Y2 - 8 September 2013 through 12 September 2013
ER -