An 8-bit 200 MSPS CMOS A/D converter for analog interface module of TFT-LCD driver

Samgsuk Kim, Minkyu Song

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

27 Scopus citations

Abstract

A 3 V 8-bit 200 MSPS CMOS folding/interpolation A/D converter for analog interface module of TFT-LCD Driver is proposed. It is composed of both a coarse ADC and a fine ADC whose FR (Folding Rate) is 8, NFB (Number of Folding Block) is 4, and IR (interpolation Rate) is 8, respectively. For the purpose of improving SNDR, distributed track-and-hold circuits are included at the input stage. In order to obtain a high speed operation and low power consumption, further, a novel analog latch and digital encoder based on a fast compression algorithm are proposed. The chip has been fabricated with a 0.35 μm 2-poly 3-metal CMOS technology. The effective chip area is about 1.2 mm/spl times/0.8 mm and it dissipates about 210 mW at 3 V power supply. The INL and DNL are within 1 LSB, respectively. The SNDR is about 43 dB, when the input frequency reaches 10 MHz at 200 MHz clock frequency.

Original languageEnglish
Title of host publicationISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages528-531
Number of pages4
DOIs
StatePublished - 2001
Event2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
Duration: 6 May 20019 May 2001

Publication series

NameISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume1

Conference

Conference2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
Country/TerritoryAustralia
CitySydney, NSW
Period6/05/019/05/01

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