TY - GEN
T1 - An efficient location cache scheme for hierarchical database architecture in PCS networks
AU - Han, Youn Hee
AU - Gil, Joon Min
AU - Hwang, Seung Hee
AU - Hwang, Chong Sun
AU - Jeong, Young Sik
N1 - Publisher Copyright:
© 2001 IEEE.
PY - 2001
Y1 - 2001
N2 - Recently, hierarchical architecture for location databases has been proposed in order to accommodate the growing number of PCSs user. With the 3-level hierarchical database architecture, which is compatible with the current cellular mobile systems, newly developed additional databases, including the regional location database (RLR), are positioned between the HLR and the VLRs. We propose an efficient cache scheme, the Double T-thresholds Location Cache Scheme, could reduce the network and database costs to lookup a portable using the 3-level architecture. The idea behind our proposed scheme is to use two pieces of cache information, VLR and RLR, which are serving the called portables. These two pieces are required in order to exploit not only the locality of a registration area (RA) but also the locality of a regional registration area (RRA), a wide area covered by the RLR. We also use two threshold values in order to determine whether the two pieces are obsolete. The cost analysis presented in this paper shows that the double T-thresholds location cache scheme significantly reduces network and database costs for most patterns of portables.
AB - Recently, hierarchical architecture for location databases has been proposed in order to accommodate the growing number of PCSs user. With the 3-level hierarchical database architecture, which is compatible with the current cellular mobile systems, newly developed additional databases, including the regional location database (RLR), are positioned between the HLR and the VLRs. We propose an efficient cache scheme, the Double T-thresholds Location Cache Scheme, could reduce the network and database costs to lookup a portable using the 3-level architecture. The idea behind our proposed scheme is to use two pieces of cache information, VLR and RLR, which are serving the called portables. These two pieces are required in order to exploit not only the locality of a registration area (RA) but also the locality of a regional registration area (RRA), a wide area covered by the RLR. We also use two threshold values in order to determine whether the two pieces are obsolete. The cost analysis presented in this paper shows that the double T-thresholds location cache scheme significantly reduces network and database costs for most patterns of portables.
UR - http://www.scopus.com/inward/record.url?scp=84981275594&partnerID=8YFLogxK
U2 - 10.1109/IPDPS.2001.925194
DO - 10.1109/IPDPS.2001.925194
M3 - Conference contribution
AN - SCOPUS:84981275594
T3 - Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001
SP - 1985
EP - 1992
BT - Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001
Y2 - 23 April 2001 through 27 April 2001
ER -