TY - JOUR
T1 - An HLA-Based Distributed Cosimulation Framework in Mixed-Signal System-on-Chip Design
AU - Seok, Moon Gi
AU - Kim, Tag Gon
AU - Choi, Chang Beom
AU - Park, Daejin
N1 - Publisher Copyright:
© 1993-2012 IEEE.
PY - 2017/2
Y1 - 2017/2
N2 - In mixed-signal system-on-chip (SoC) design, distributed cosimulation is one of the practical approaches for unifying various abstracted hardware models using different description languages. Conventional ad hoc distributed cosimulation solutions do not have formal theoretical backgrounds of simulator integration into their solutions. In this brief, we propose a general cosimulation framework based on the high-level architecture (HLA) and newly defined programming language interface for interoperation (PLI-I) as a formal simulator interface. Based on the PLI-I and HLA, we propose formal integration and interoperation procedures. To reduce integration costs, the procedures have been developed into a common library and then merged with model-dependent signal-event converter to handle differently abstracted in/out signals. During the interoperation, to resolve the different time-advance mechanisms of the digital and analog simulators, the adapter executes an advanced HLA-based synchronization based on the presimulation concepts. The case study shows the reduced design effort in integrating and validating the heterogeneous models and simulators using the proposed framework in mixed-signal SoC design.
AB - In mixed-signal system-on-chip (SoC) design, distributed cosimulation is one of the practical approaches for unifying various abstracted hardware models using different description languages. Conventional ad hoc distributed cosimulation solutions do not have formal theoretical backgrounds of simulator integration into their solutions. In this brief, we propose a general cosimulation framework based on the high-level architecture (HLA) and newly defined programming language interface for interoperation (PLI-I) as a formal simulator interface. Based on the PLI-I and HLA, we propose formal integration and interoperation procedures. To reduce integration costs, the procedures have been developed into a common library and then merged with model-dependent signal-event converter to handle differently abstracted in/out signals. During the interoperation, to resolve the different time-advance mechanisms of the digital and analog simulators, the adapter executes an advanced HLA-based synchronization based on the presimulation concepts. The case study shows the reduced design effort in integrating and validating the heterogeneous models and simulators using the proposed framework in mixed-signal SoC design.
KW - High-level architecture (HLA)/runtime infrastructure (RTI)
KW - mixed-signal design
KW - simulator interoperation
KW - system-level verification
KW - System-on-chip (SoC) design
UR - http://www.scopus.com/inward/record.url?scp=84981727326&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2016.2594948
DO - 10.1109/TVLSI.2016.2594948
M3 - Article
AN - SCOPUS:84981727326
SN - 1063-8210
VL - 25
SP - 760
EP - 764
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 2
M1 - 7536626
ER -