Abstract
For the static random access memories (SRAMs) with high-(k)metal gate transistors, positive bias temperature instability (PBTI)-induced stability degradation can be significant. In this letter, we analyze the temporal variations of the READ/WRITE operations and static noise margin of a conventional 6T-SRAM cell using a physics-based PBTI model. We show that the dependence of BTI effects on intrinsic variations and the design parameters of SRAM are significant A 10 mV increase in intrinsic variations can lead to double the BTI-induced read failure rate. Furthermore, SRAM is more sensitive to PBTI effects as compared with negative bias temperature instability These results validate that stochastic modeling of PBTI is required for reliable SRAM design.
Original language | English |
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Article number | 6868239 |
Pages (from-to) | 951-953 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 35 |
Issue number | 9 |
DOIs | |
State | Published - Sep 2014 |
Keywords
- negative bias temperature instability (NBTI)
- positive bias temperature instability (PBTI)
- static noise margin (SNM)
- Static random access memory (SRAM)