Abstract
The performance of parallel systems under commercial applications strongly depend on the speeds of IO subsystems and interconnects. Any single bottleneck in there hinder one from fully taking advantages of today's faster CPUs and better instruction architectures. Therefore, configuring bottleneck-free IO subsystems and interconnects is essential. In this paper, we considered IO subsystem and interconnect in SPAX system. When the SPAX's IO subsystem is lightly equipped, the first bottleneck appears at disk drives. Although the disk bottleneck can be removed by putting more disks, another bottleneck was detected at the data buffer which is the first component in communication path. That is to say, all components in IO subsystems and interconnects must be sufficiently equipped, simultaneously, to thoroughly eliminate the bottleneck. We could reach at the cost-effective bottleneck-free configuration of SPAX by making use of its flexible hardware design. The simulation results of SPAX then show significant performance gain from faster CPUs with better instruction architectures.
Original language | English |
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Pages | 524-533 |
Number of pages | 10 |
State | Published - 1997 |
Event | Proceedings of the 1997 International Conference on Parallel and Distributed Systems - Seoul, South Korea Duration: 10 Dec 1997 → 13 Dec 1997 |
Conference
Conference | Proceedings of the 1997 International Conference on Parallel and Distributed Systems |
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City | Seoul, South Korea |
Period | 10/12/97 → 13/12/97 |