TY - JOUR
T1 - Bus encoding for low-power high-performance memory systems
AU - Chang, Naehyuck
AU - Kim, Kwanho
AU - Cho, Jinsung
PY - 2000
Y1 - 2000
N2 - High-performance memory buses consume large energy as they include termination networks, BiCMOS and/or open-drain output. This paper introduces power reduction techniques for memory systems deliberating on burst-mode transfers over the high-speed bus specifications such as Low Voltage BiCMOS (LVT), Gunning Transfer Logic (GTL+) and Stub Series Termination Logic (SSTL_2) which are widely used. The reduction techniques take both the static and the dynamic power consumption into account because most high-performance bus drivers and end-termination networks dissipate significant static power as well. Extensive performance analysis is conducted through mathematical analysis and trace data-driven simulations. We had reduction of 14% with random data and up to 67.5% with trace data.
AB - High-performance memory buses consume large energy as they include termination networks, BiCMOS and/or open-drain output. This paper introduces power reduction techniques for memory systems deliberating on burst-mode transfers over the high-speed bus specifications such as Low Voltage BiCMOS (LVT), Gunning Transfer Logic (GTL+) and Stub Series Termination Logic (SSTL_2) which are widely used. The reduction techniques take both the static and the dynamic power consumption into account because most high-performance bus drivers and end-termination networks dissipate significant static power as well. Extensive performance analysis is conducted through mathematical analysis and trace data-driven simulations. We had reduction of 14% with random data and up to 67.5% with trace data.
UR - http://www.scopus.com/inward/record.url?scp=0033720602&partnerID=8YFLogxK
U2 - 10.1145/337292.337778
DO - 10.1145/337292.337778
M3 - Conference article
AN - SCOPUS:0033720602
SN - 0738-100X
SP - 800
EP - 805
JO - Proceedings - Design Automation Conference
JF - Proceedings - Design Automation Conference
T2 - DAC 2000: 37th Design Automation Conference
Y2 - 5 June 2000 through 9 June 2000
ER -