Charge traps and interface traps in non-volatile memory device with Oxide-Nitride-Oxide structures

M. W. Seo, D. W. Kwak, W. S. Cho, C. J. Park, W. S. Kim, H. Y. Cho

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

Charge traps and interface traps in ONO (Oxide-Nitride-Oxide) structures fabricated on Si (001) substrates have been investigated. Nitride-related traps are observed to be located in the range of 2.44-2.48 eV above the valence band maximum of the nitride layer. It is demonstrated that the capacitance transient spectroscopy method could be a tool to evaluate properties of the tunneling oxide and the nitride effect on interface states.

Original languageEnglish
Pages (from-to)245-247
Number of pages3
JournalThin Solid Films
Volume517
Issue number1
DOIs
StatePublished - 3 Nov 2008

Keywords

  • Charge trap
  • DLTS
  • Interface trap
  • Non-volatile memory
  • ONO

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