Design of a configurable bit-resolution CMOS image sensor for the image depth extraction

Seongjoo Lee, Minkyu Song

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Design of a configurable bit-resolution CMOS image sensor(CIS) is described. Recently, CIS pixel matrixes composed of both RGB and Infrared(IR) color filters are used for the implementation of an image depth extraction. However, in order to compensate the light density between RGB and IR, the singleslope ADC inside of CIS must have a configurable bit-resolution. For example, RGB signal has a 8-bit resolution, while IR signal has an 12-bit resolution. The proposed CIS has 4 different bit resolutions for RGB pixel, such as 8-bit, 6-bit, 4-bit and 2-bit. The proposed ADC has a maximum resolution of 12-bit for IR pixels with the architecture of two-step single-slope(TS SS) type. The proposed CIS has a 100MHz clock, and it has been designed with 0.18μm CIS technology.

Original languageEnglish
Title of host publicationISOCC 2016 - International SoC Design Conference
Subtitle of host publicationSmart SoC for Intelligent Things
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages139-140
Number of pages2
ISBN (Electronic)9781467393089
DOIs
StatePublished - 27 Dec 2016
Event13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of
Duration: 23 Oct 201626 Oct 2016

Publication series

NameISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things

Conference

Conference13th International SoC Design Conference, ISOCC 2016
Country/TerritoryKorea, Republic of
CityJeju
Period23/10/1626/10/16

Keywords

  • CMOS image sensor
  • Configurable bit-resolution
  • Image depth extraction
  • RGB pixels and IR pixel
  • Single-slope ADC

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