TY - GEN
T1 - Design of a hybrid column segmented CMOS Image sensor with an artificial intelligence core and a novel SRAM readout logic
AU - Park, Keunyeol
AU - Lee, Cheeyoung
AU - Kim, Soo Youn
AU - Song, Minkyu
N1 - Publisher Copyright:
© 2019 Institute of Electronics and Information Engineers (IEIE).
PY - 2019/5/3
Y1 - 2019/5/3
N2 - In this paper, a hybrid column segmented CMOS image sensor (CIS) with an artificial intelligence (AI) core and a novel SRAM readout circuit is presented. To obtain a high performance and high speed column parallel CIS, each column is segmented into two parts: the first one is a DC reference voltage generator with a bandgap reference circuit, and the second one is a fine ramp generator with an AI core and a digital-to-analog converter (DAC). Further, a novel SRAM readout circuit to improve the speed of digital block is also discussed. Based on this hybrid column segmented technique, excellent measured results are reported. With a 90nm backside illumination (BSI) technology, a 12-bit resolution image quality and 407uW power consumption per column are satisfied.
AB - In this paper, a hybrid column segmented CMOS image sensor (CIS) with an artificial intelligence (AI) core and a novel SRAM readout circuit is presented. To obtain a high performance and high speed column parallel CIS, each column is segmented into two parts: the first one is a DC reference voltage generator with a bandgap reference circuit, and the second one is a fine ramp generator with an AI core and a digital-to-analog converter (DAC). Further, a novel SRAM readout circuit to improve the speed of digital block is also discussed. Based on this hybrid column segmented technique, excellent measured results are reported. With a 90nm backside illumination (BSI) technology, a 12-bit resolution image quality and 407uW power consumption per column are satisfied.
KW - Artificial intelligence core
KW - CMOS image sensor
KW - Hybrid column segmented
KW - SRAM readout logic
UR - http://www.scopus.com/inward/record.url?scp=85065879915&partnerID=8YFLogxK
U2 - 10.23919/ELINFOCOM.2019.8706338
DO - 10.23919/ELINFOCOM.2019.8706338
M3 - Conference contribution
AN - SCOPUS:85065879915
T3 - ICEIC 2019 - International Conference on Electronics, Information, and Communication
BT - ICEIC 2019 - International Conference on Electronics, Information, and Communication
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th International Conference on Electronics, Information, and Communication, ICEIC 2019
Y2 - 22 January 2019 through 25 January 2019
ER -