Design of a Low Power CMOS Image Sensor with an in-Comparator Forcasting Technique and a Novel Counter

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Abstract

This paper presents an in-comparator forecasting technique (IFT) and a novel counter for low power CMOS image sensors. The proposed circuit employs a closed-loop capacitive amplifier as a zero-crossing forecaster which is positioned between the first and second-stage comparator. This circuit provides excellent tolerance to process, voltage, temperature variations, low gain variation, and a clearly defined switching gain. Further, a novel counter to implement IFT is discussed. The proposed CIS is demonstrated using a 110nm image sensor process with an image resolution of 640 x 480 and a 2.8/1.5V power supply. The measured results show that the power consumption of digital blocks, including counters, is reduced by 40% with the proposed IFT, leading to a 20% reduction in total power consumption.

Original languageEnglish
Title of host publication2024 31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350377200
DOIs
StatePublished - 2024
Event31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024 - Nancy, France
Duration: 18 Nov 202420 Nov 2024

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
ISSN (Print)2994-5755
ISSN (Electronic)2995-0589

Conference

Conference31st IEEE International Conference on Electronics, Circuits and Systems, ICECS 2024
Country/TerritoryFrance
CityNancy
Period18/11/2420/11/24

Keywords

  • CMOS Image Sensor(CIS)
  • In-comparator Forecasting Technique (IFT)
  • Novel Counter
  • Zero-crossing Forecaster

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