Dual gate-recess structure of metamorphic high-electron-mobility transistors for enhancing f_max

We present a gate-recess structure for 0.1 μm metamorphic high-electron-mobility transistors to enhance the maximum frequency of oscillation (f_max). Among the established gate-recess structures, the narrow gate-recess structure shows a degraded f_max, despite superior dc characteristics due to a large gate-to-drain capacitance (C_gd) caused by a small effective gate-to-drain spacing, while the wide gate-recess structure exhibits lower dc characteristics due to the surface effects. To minimize C_gd and maintain the dc characteristics of the narrow gate-recess structure, an additional gate-recess is performed for an electrical isolation between the drain side cap layer and drain electrode. We obtain almost the same extrinsic transconductance of ∼600 mSmm from this, while we achieve ∼18% enhancement of f_max (∼317 GHz) due to ∼16% reduction of C_gd by the increase of effective gate-to-drain spacing compared to the narrow gate-recess structure.