TY - JOUR
T1 - Effects of Si3N4 passivation on the dc and RF characteristics of metamorphic high-electron-mobility transistors depending on the gate-recess structures
AU - Oh, J. H.
AU - Han, M.
AU - Baek, Y. H.
AU - Moon, S. W.
AU - Rhee, J. K.
AU - Kim, S. D.
PY - 2009
Y1 - 2009
N2 - Effects of the Si3N4 passivation on the dc and RF characteristics of a 0.1 νm metamorphic high-electron-mobility transistor (HEMT) are investigated for narrow and wide gate-recess structures. Maximum drain-source saturation current (Idss,max) and maximum extrinsic transconductance (gm,max) are reduced by ∼14.8 and ∼11.6%, respectively, in the wide gate-recess structure after the passivation; on the other hand, only ∼5.7 and ∼4.9% reductions are measured from I dss,max and gm,max, respectively, in the narrow gate-recess structure. We examine the passivation-induced degradation by using a modified charge control model assuming the charged surface states on the Si3N4 interface and a comparative study of the hydrodynamic device simulation with the experimental measurement. From the analysis, it is proposed that the difference of degradation in two different gate structures is due to an approximately three times higher charged surface state density of ∼4.5 × 1011 cm-2 in the wide gate-recess structure than ∼1.6 × 1011 cm-2 in the narrow gate-recess structure. The cut-off frequency (fT) of the wide gate-recess structure also exhibits a greater reduction of ∼14.5%, while the fT of the narrow gate-recess structure is reduced by only ∼6.6% after the passivation. This is mainly due to the passivation-induced surface states of a higher density in the wide gate-recess structure. A great increase of the gate-to-drain parasitic capacitance in the wide gate-recess structure makes a major contribution to ∼13.5% degradation of the maximum frequency of oscillation.
AB - Effects of the Si3N4 passivation on the dc and RF characteristics of a 0.1 νm metamorphic high-electron-mobility transistor (HEMT) are investigated for narrow and wide gate-recess structures. Maximum drain-source saturation current (Idss,max) and maximum extrinsic transconductance (gm,max) are reduced by ∼14.8 and ∼11.6%, respectively, in the wide gate-recess structure after the passivation; on the other hand, only ∼5.7 and ∼4.9% reductions are measured from I dss,max and gm,max, respectively, in the narrow gate-recess structure. We examine the passivation-induced degradation by using a modified charge control model assuming the charged surface states on the Si3N4 interface and a comparative study of the hydrodynamic device simulation with the experimental measurement. From the analysis, it is proposed that the difference of degradation in two different gate structures is due to an approximately three times higher charged surface state density of ∼4.5 × 1011 cm-2 in the wide gate-recess structure than ∼1.6 × 1011 cm-2 in the narrow gate-recess structure. The cut-off frequency (fT) of the wide gate-recess structure also exhibits a greater reduction of ∼14.5%, while the fT of the narrow gate-recess structure is reduced by only ∼6.6% after the passivation. This is mainly due to the passivation-induced surface states of a higher density in the wide gate-recess structure. A great increase of the gate-to-drain parasitic capacitance in the wide gate-recess structure makes a major contribution to ∼13.5% degradation of the maximum frequency of oscillation.
UR - http://www.scopus.com/inward/record.url?scp=65549133359&partnerID=8YFLogxK
U2 - 10.1088/0268-1242/24/2/025027
DO - 10.1088/0268-1242/24/2/025027
M3 - Article
AN - SCOPUS:65549133359
SN - 0268-1242
VL - 24
JO - Semiconductor Science and Technology
JF - Semiconductor Science and Technology
IS - 2
M1 - 025027
ER -