Effects of the gate recess structure on the DC electrical behavior of 0.1-μm metamorphic high-electron-mobility transistors

We examine the effects of the gate recess structure on the DC characteristics of 0.1-μm metamorphic high-electron-mobility transistors (MHEMTs). Compared to the wide gate recess structure, the narrow gate recess structure shows a significant increase in the drain-source saturation current from 440 to 710 mA/mm and in the extrinsic transconductance from 420 to 910 mS/mm. We propose that the observed variations in the DC characteristics are due to deep-level accepter-type interface traps formed between the silicon-nitride passivation layer and the Schottky barrier layer. We perform device simulations by using the hydrodynamic model based upon the proposed mechanism, and the simulation results show good agreement with the data obtained from the fabricated devices.