Framework for simulation of the Verilog/SPICE mixed model: Interoperation of Verilog and SPICE simulators using HLA/RTI for model reusability

Moon Gi Seok, Dae Jin Park, Geun Rae Cho, Tag Gon Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Designing a mixed-signal integrated hardware requires the mixed simulation for legacy digital blocks and analog circuits, which are usually represented by the Verilog description language for digital blocks and the SPICE circuit netlist of analog circuits. Without model translations or source-level modifications and to simulate mixed legacy Verilog models and SPICE circuit netlists that are usually developed based on the different SPICE languages, parameters and primitives, this paper proposes a simulation framework whose concept is connecting a legacy Verilog and proper SPICE simulator for the target SPICE model using a run-time infrastructure (RTI) based on high level architecture (HLA) and adapters that are pluggable libraries to enable the interoperation and integration of simulators through HLA. For the interoperation, to exchange analog/digital signals, the adapter converts analog/digital signals to events or events to analog/digital signals using user-defined, signal-event converters. To synchronize different time advance policies, the adapter performs time synchronization procedures based on the pre-simulation concept. For the integration of Verilog/SPICE simulators and the RTI, adapters are developed following each component interface, which are IEEE-std Verilog procedural interface, proposed SPICE procedural interface and IEEE-std HLA interface. The proposed framework was applied to the digitally controlled buck converter simulation.

Original languageEnglish
Title of host publication2014 22nd International Conference on Very Large Scale Integration, VLSI-SoC 2014 - Conference Proceedings
EditorsLorena Garcia
PublisherIEEE Computer Society
EditionJanuary
ISBN (Electronic)9781479960163
DOIs
StatePublished - 7 Jan 2015
Event2014 22nd International Conference on Very Large Scale Integration, VLSI-SoC 2014 - Playa del Carmen, Mexico
Duration: 6 Oct 20148 Oct 2014

Publication series

NameIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
NumberJanuary
Volume2015-January
ISSN (Print)2324-8432
ISSN (Electronic)2324-8440

Conference

Conference2014 22nd International Conference on Very Large Scale Integration, VLSI-SoC 2014
Country/TerritoryMexico
CityPlaya del Carmen
Period6/10/148/10/14

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