Abstract
In this paper, we present a resource-constrained global scheduling technique for synthesis applications. The algorithm accepts specifications containing conditional branches and while loops and schedules them for a given set of resources. The algorithm performs several types of code motions across different basic blocks and trades off cost with performance. Several real-life examples are used to demonstrate the efficacy of the approach.
Original language | English |
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Pages (from-to) | 542-546 |
Number of pages | 5 |
Journal | Proceedings - Design Automation Conference |
DOIs | |
State | Published - 1994 |
Event | Proceedings of the 31st Design Automation Conference - San Diego, CA, USA Duration: 6 Jun 1994 → 10 Jun 1994 |