Position Control of Self-Grown III-V Nanowire Arrays on Si Substrates via Micrometer-Size Patterns by Photolithography

Young Ho Song, Doo Gun Kim, Dong Wook Lee, Jeong Woo Hwang, Parsian K. Mohseni, Jae Cheol Shin, Xiuling Li

Research output: Contribution to journalArticlepeer-review

Abstract

Catalyst-free growth of III-V semiconductors has received increasing attention due to the realization of large-area synthesis and the catalyst-related contamination-free nature. In this study, we demonstrate the direct heteroepitaxy of III-V nanowire arrays on silicon (Si) substrates. To grow the nanowires, a micrometer-scale SiNxpattern was fabricated using a conventional photolithography technique. A single InAs nanowire with a diameter as small as 300 nm was successfully grown on a 2 μm diameter hole array patterned with SiNxon a Si (111) substrate. The number of nanowires per hole varied with the hole size. The diameter and height of the nanowires was controlled by varying the growth parameters, including the growth temperature, growth pressure, and V/III ratio. This work represents the first report on ordered III-V nanowire arrays grown on silicon substrates using an industry-standard photolithographic process.

Original languageEnglish
Pages (from-to)2266-2271
Number of pages6
JournalCrystal Growth and Design
Volume22
Issue number4
DOIs
StatePublished - 6 Apr 2022

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