Power-law logistic model for the current-time characteristic of metal gate/high-K/III-V semiconductor capacitors

E. Miranda, C. Mahata, T. Das, C. K. Maiti

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper deals with the leakage current variation occurring in Al/HfYOx/GaAs capacitors subjected to constant electrical stress. It is shown that the current-time characteristic of such structures follows a power-law logistic model that arises from an extension of the Curie-von Schweidler law. The proposed model is based on an equivalent electrical circuit representation of the degraded structure in which series and parallel resistances play a fundamental role.

Original languageEnglish
Title of host publicationProceedings of the 8th Spanish Conference on Electron Devices, CDE'2011
DOIs
StatePublished - 2011
Event8th Spanish Conference on Electron Devices, CDE 2011 - Palma de Mallorca, Spain
Duration: 8 Feb 201111 Feb 2011

Publication series

NameProceedings of the 8th Spanish Conference on Electron Devices, CDE'2011

Conference

Conference8th Spanish Conference on Electron Devices, CDE 2011
Country/TerritorySpain
CityPalma de Mallorca
Period8/02/1111/02/11

Keywords

  • capacitors
  • elecctrical stress
  • GaAs
  • high-K
  • MOS
  • reliability

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