TY - JOUR
T1 - Reset-dominant accurate synaptic weight mapping in passive memristor arrays for energy-efficient spiking neural networks
AU - Byun, Yongjin
AU - Kim, Gimun
AU - Kim, Sungjoon
AU - Kim, Sungjun
N1 - Publisher Copyright:
© 2025 Elsevier Ltd
PY - 2025/9
Y1 - 2025/9
N2 - This study presents a novel reset-dominant synaptic weight programming strategy for passive memristor crossbar arrays, enabling high-precision neuromorphic computing without external current compliance circuitry. We introduce a naturally formed Overshoot Suppression Layer (OSL) within a Pt/Al/TiOx/Al₂O₃/Pt device stack, which intrinsically limits overshoot current during the set process and allows for stable analog switching. Combined with a half-bias programming scheme, this structure significantly suppresses cell-to-cell interference, a critical challenge in high-density memristor arrays. To further enhance weight accuracy, we propose the Initial-Low Resistance State (LRS) scheme, a reset-dominant programming method that minimizes abrupt conductance variation induced by set pulses. Using an incremental step pulse with verification algorithm (ISPVA), we successfully programmed 20 discrete conductance levels with a mean vector-matrix multiplication (VMM) error of 419.8 nA. Notably, 99 % of the weights fell within a 1.5 µA error margin, demonstrating the high precision of our approach. System-level validation was conducted through hardware-based inference using a spiking neural network (SNN) trained on the MNIST dataset, achieving a classification accuracy of 88.85 %, only 1.7 % below the ideal software baseline. This work highlights a scalable and CMOS-compatible solution for achieving accurate, energy-efficient VMM in passive memristor arrays, offering strong potential for next-generation neuromorphic hardware.
AB - This study presents a novel reset-dominant synaptic weight programming strategy for passive memristor crossbar arrays, enabling high-precision neuromorphic computing without external current compliance circuitry. We introduce a naturally formed Overshoot Suppression Layer (OSL) within a Pt/Al/TiOx/Al₂O₃/Pt device stack, which intrinsically limits overshoot current during the set process and allows for stable analog switching. Combined with a half-bias programming scheme, this structure significantly suppresses cell-to-cell interference, a critical challenge in high-density memristor arrays. To further enhance weight accuracy, we propose the Initial-Low Resistance State (LRS) scheme, a reset-dominant programming method that minimizes abrupt conductance variation induced by set pulses. Using an incremental step pulse with verification algorithm (ISPVA), we successfully programmed 20 discrete conductance levels with a mean vector-matrix multiplication (VMM) error of 419.8 nA. Notably, 99 % of the weights fell within a 1.5 µA error margin, demonstrating the high precision of our approach. System-level validation was conducted through hardware-based inference using a spiking neural network (SNN) trained on the MNIST dataset, achieving a classification accuracy of 88.85 %, only 1.7 % below the ideal software baseline. This work highlights a scalable and CMOS-compatible solution for achieving accurate, energy-efficient VMM in passive memristor arrays, offering strong potential for next-generation neuromorphic hardware.
KW - Memristor arrays
KW - Overshoot suppression
KW - Spiking neural networks
KW - Vector-matrix multiplication
KW - Weight transfer
UR - https://www.scopus.com/pages/publications/105008491158
U2 - 10.1016/j.nanoen.2025.111261
DO - 10.1016/j.nanoen.2025.111261
M3 - Article
AN - SCOPUS:105008491158
SN - 2211-2855
VL - 142
JO - Nano Energy
JF - Nano Energy
M1 - 111261
ER -