Self-aligned top-gate metal-oxide thin-film transistors using a solution-processed polymer gate dielectric

Seungbeom Choi, Seungho Song, Taegyu Kim, Jae Cheol Shin, Jeong Wan Jo, Sung Kyu Park, Yong Hoon Kim

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

For high-speed and large-area active-matrix displays, metal-oxide thin-film transistors (TFTs) with high field-effect mobility, stability, and good uniformity are essential. Moreover, reducing the RC delay is also important to achieve high-speed operation, which is induced by the parasitic capacitance formed between the source/drain (S/D) and the gate electrodes. From this perspective, self-aligned top-gate oxide TFTs can provide advantages such as a low parasitic capacitance for high-speed displays due to minimized overlap between the S/D and the gate electrodes. Here, we demonstrate self-aligned top-gate oxide TFTs using a solution-processed indium-gallium-zinc-oxide (IGZO) channel and crosslinked poly(4-vinylphenol) (PVP) gate dielectric layers. By applying a selective Ar plasma treatment on the IGZO channel, low-resistance IGZO regions could be formed, having a sheet resistance value of ~20.6 kΩ/sq., which can act as the homojunction S/D contacts in the top-gate IGZO TFTs. The fabricated self-aligned top-gate IGZO TFTs exhibited a field-effect mobility of 3.93 cm2 /Vs and on/off ratio of ~106, which are comparable to those fabricated using a bottom-gate structure. Furthermore, we also demonstrated self-aligned top-gate TFTs using electrospun indium-gallium-oxide (IGO) nanowires (NWs) as a channel layer. The IGO NW TFTs exhibited a field-effect mobility of 0.03 cm2 /Vs and an on/off ratio of >105 . The results demonstrate that the Ar plasma treatment for S/D contact formation and the solution-processed PVP gate dielectric can be implemented in realizing self-aligned top-gate oxide TFTs.

Original languageEnglish
Article number1035
Pages (from-to)1-10
Number of pages10
JournalMicromachines
Volume11
Issue number12
DOIs
StatePublished - Dec 2020

Keywords

  • Polymer gate dielectric
  • Self-aligned
  • Solution process
  • Thin-film transistor
  • Top-gate

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