Simple odd number frequency divider with 50% duty cycle

Sangjin Byun; Chung Hwan Son; Jae Joon Kim

doi:10.1587/elex.9.1249

Simple odd number frequency divider with 50% duty cycle

Sangjin Byun
, Chung Hwan Son
, Jae Joon Kim

Department of Electronics & Electrical Engineering

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

A simple odd number frequency divider with 50% duty cycle is presented. The odd number frequency divider consists of a general odd number counter and the proposed duty cycle trimming circuit. The duty cycle trimming circuit can output 50% duty cycle with only additional six transistors. A prototype divide-by-5 circuit with 50% duty cycle was implemented for a 500-Mb/s ~ 5.6-Gb/s 1:10 CDR/DEMUX IC in a 0.13 μm 1P8M CMOS process.

Original language	English
Pages (from-to)	1249-1253
Number of pages	5
Journal	IEICE Electronics Express
Volume	9
Issue number	15
DOIs	https://doi.org/10.1587/elex.9.1249
State	Published - 2012

Keywords

Duty cycle
Odd number frequency divider

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10.1587/elex.9.1249

Cite this

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title = "Simple odd number frequency divider with 50\% duty cycle",

abstract = "A simple odd number frequency divider with 50\% duty cycle is presented. The odd number frequency divider consists of a general odd number counter and the proposed duty cycle trimming circuit. The duty cycle trimming circuit can output 50\% duty cycle with only additional six transistors. A prototype divide-by-5 circuit with 50\% duty cycle was implemented for a 500-Mb/s \textasciitilde{} 5.6-Gb/s 1:10 CDR/DEMUX IC in a 0.13 μm 1P8M CMOS process.",

keywords = "Duty cycle, Odd number frequency divider",

author = "Sangjin Byun and Son, \{Chung Hwan\} and Kim, \{Jae Joon\}",

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AU - Son, Chung Hwan

AU - Kim, Jae Joon

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AB - A simple odd number frequency divider with 50% duty cycle is presented. The odd number frequency divider consists of a general odd number counter and the proposed duty cycle trimming circuit. The duty cycle trimming circuit can output 50% duty cycle with only additional six transistors. A prototype divide-by-5 circuit with 50% duty cycle was implemented for a 500-Mb/s ~ 5.6-Gb/s 1:10 CDR/DEMUX IC in a 0.13 μm 1P8M CMOS process.

KW - Duty cycle

KW - Odd number frequency divider

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DO - 10.1587/elex.9.1249

M3 - Article

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JO - IEICE Electronics Express

JF - IEICE Electronics Express

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Simple odd number frequency divider with 50% duty cycle

Abstract

Keywords

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