TY - GEN
T1 - Wafer-scale fabrication of nanometer silicon posts for capacitive micromachined ultrasonic transducers with substrate-embedded springs
AU - Kim, Hae Youn
AU - Kang, Dong Hyun
AU - Kim, Jinsik
AU - Khuri-Yakub, Butrus T.
AU - Lee, Byung Chul
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/9/7
Y1 - 2020/9/7
N2 - A capacitive micromachined ultrasonic transducer (CMUT) with substrate-embedded springs has been demonstrated high transmit efficiency with non-flexural parallel-plate piston movement. In this paper, we introduce whole wafer-scale uniform nanometer silicon posts with a fabrication technique of combination between DRIE and RIE. In order to maintain our fabrication cost-effective, a photomask with a minimum feature size of 2.0 mu m was used for whole wafer-scale photolithography, and a size-reduced RIE process followed by DRIE was conducted for achieving the sub-micron or nanometer post area. Furthermore, In-situ nanomechanical tests of the fabricated silicon posts were conducted using a pico-indenter (PI 85L Pico-Indenter, Bruker) monitored under a scanning electron microscopy. The length and the diameter of the silicon post after size-reduction by RIE are measured as 5.6 mu m and.74 mu m, respectively. The uniformity across the whole 4-inch wafer is less than 5%. The loading-unloading graph by In-situ nanomechanical experiments confirmed that the silicon posts could consistently achieve above 6% elastic strain. We are currently applying this nanometer springs to the CMUTs with substrate-embedded springs.
AB - A capacitive micromachined ultrasonic transducer (CMUT) with substrate-embedded springs has been demonstrated high transmit efficiency with non-flexural parallel-plate piston movement. In this paper, we introduce whole wafer-scale uniform nanometer silicon posts with a fabrication technique of combination between DRIE and RIE. In order to maintain our fabrication cost-effective, a photomask with a minimum feature size of 2.0 mu m was used for whole wafer-scale photolithography, and a size-reduced RIE process followed by DRIE was conducted for achieving the sub-micron or nanometer post area. Furthermore, In-situ nanomechanical tests of the fabricated silicon posts were conducted using a pico-indenter (PI 85L Pico-Indenter, Bruker) monitored under a scanning electron microscopy. The length and the diameter of the silicon post after size-reduction by RIE are measured as 5.6 mu m and.74 mu m, respectively. The uniformity across the whole 4-inch wafer is less than 5%. The loading-unloading graph by In-situ nanomechanical experiments confirmed that the silicon posts could consistently achieve above 6% elastic strain. We are currently applying this nanometer springs to the CMUTs with substrate-embedded springs.
KW - Capacitive micromachined ultrasonic transducer
KW - Nanometer silicon posts
KW - Size-reduction process
KW - Wafer-scale
UR - http://www.scopus.com/inward/record.url?scp=85097875439&partnerID=8YFLogxK
U2 - 10.1109/IUS46767.2020.9251528
DO - 10.1109/IUS46767.2020.9251528
M3 - Conference contribution
AN - SCOPUS:85097875439
T3 - IEEE International Ultrasonics Symposium, IUS
BT - IUS 2020 - International Ultrasonics Symposium, Proceedings
PB - IEEE Computer Society
T2 - 2020 IEEE International Ultrasonics Symposium, IUS 2020
Y2 - 7 September 2020 through 11 September 2020
ER -